Synopsys IO Library IP

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Overview

Synopsys IO Library IP provides designers with the input/output operations, functionality and reliability required for their systems targeting mobile, automotive, and high-performance computing (HPC) and GPU applications. The IP is silicon proven and is available in multiple foundries and process technologies from 3nm to 22nm. Synopsys' I/O portfolio includes robust general-purpose IOs (GPIOs), and specialty IOs (3DIO Platform, LVDS, SD/eMMC, I2C, I3C, Crystal Oscillator and xSPI), helping designers achieve power, performance, and area (PPA) targets for their SoCs with low risk and fast time-to-market.

Synopsys IO Library IP offering includes support for multiple IO bus protocols. Synopsys IOs enable the industry’s most comprehensive supply voltage range and have robust ESD for improved manufacturability (configurable CDM specs). Synopsys IOs operate at very high operating frequencies and include the broadest set of features, supporting flexible system design. These features include independent power sequencing, fail-safe/fail-tolerance features, programmable current drive with enhanced granularity, slew control, retention, and bus-keeper support.  

Synopsys IO Library IP are self-sufficient and include all the required functional cells – GPIO, supply cells, core clamps, power management cells, and supporting cells (supply, corner spacers, diode breakers, oscillators, terminators). The multi-row ring implementations & unified I/O framing help in overall area optimizations. Synopsys IOs support multiple metal stack options andend user customizations on request. 

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